1. Field of the Invention
The present invention is directed to signal processing and, more particularly, to methods and systems for sample rate conversion.
2. Related Art
In signal processing, sampled signals often need to be converted to higher or lower sample rates. For example, in audio signal processing, an audio signal is sampled at a sample rate. The resulting sampled signal is processed in a digital signal processor (“DSP”). When the DSP operates at a lower rate than the sample rate, the sampled signal is decimated to the lower rate. Decimation is well known in the art.
The DSP output is typically required to be a standardized sample rate. When the standardized sample data rate is higher than the DSP rate, the output data needs to be converted to the higher sample rate. Such a conversion is referred to herein as sample rate conversion.
Conventional sample rate converters suffer from a variety of drawbacks. For example, conventional SRCs typically interpolate between existing sample points to obtain new sample points. The interpolation is typically performed using known, pre-determined, fixed ratios between the lower data rate and the higher data rate. Results are then clocked out at the higher data rate. Such an interpolation is not performed in real time. Thus, when the higher data rate clock is affected by jitter or small/large frequency variations, for example, the higher data rate output does not necessarily track the lower data rate data.
What are needed, therefore, are improved methods and systems for sample rate conversion.